[PATCH master v3 2/3] clk: add BCM2835 auxiliary peripheral clock driver

[Ahmad Fatoum]

Commit f6ce1103fdc4 ("ARM: rpi: move clk support to a separate driver")
replaced board code setting up clocks with clkdev_add_physbase() with a
proper cprman driver that registers fixed clocks and can be referenced
from device tree.

It was not fully equivalent though, because the mini UART's clock was no
longer registered as that is provided by a different clock controller.

Import the Linux v5.17 bcm2835-aux-clk driver to fix console usage on
Raspberry Pi 3b.

Fixes: f6ce1103fdc4 ("ARM: rpi: move clk support to a separate driver")
Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
---
 drivers/clk/Makefile              |  1 +
 drivers/clk/bcm/Makefile          |  2 +
 drivers/clk/bcm/clk-bcm2835-aux.c | 66 +++++++++++++++++++++++++++++++
 3 files changed, 69 insertions(+)
 create mode 100644 drivers/clk/bcm/Makefile
 create mode 100644 drivers/clk/bcm/clk-bcm2835-aux.c

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index ee503c1edb5f..baf452de9873 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_CLK_SIFIVE)	+= sifive/
 obj-$(CONFIG_SOC_STARFIVE)	+= starfive/
 obj-$(CONFIG_COMMON_CLK_STM32F)		+= clk-stm32f4.o
 obj-$(CONFIG_MACH_RPI_COMMON)	+= clk-rpi.o
+obj-y				+= bcm/
 obj-$(CONFIG_COMMON_CLK_SCMI)	+= clk-scmi.o
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
new file mode 100644
index 000000000000..1539e9f592a8
--- /dev/null
+++ b/drivers/clk/bcm/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
+obj-$(CONFIG_ARCH_BCM283X)	+= clk-bcm2835-aux.o
diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c
new file mode 100644
index 000000000000..385cfd5d3f06
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2835-aux.c
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2015 Broadcom
+ */
+
+#include <linux/clk.h>
+#include <io.h>
+#include <of_address.h>
+#include <driver.h>
+#include <init.h>
+#include <dt-bindings/clock/bcm2835-aux.h>
+
+#define BCM2835_AUXIRQ		0x00
+#define BCM2835_AUXENB		0x04
+
+static int bcm2835_aux_clk_probe(struct device_d *dev)
+{
+	struct clk_hw_onecell_data *onecell;
+	const char *parent;
+	struct clk *parent_clk;
+	void __iomem *reg, *gate;
+
+	parent_clk = clk_get(dev, NULL);
+	if (IS_ERR(parent_clk))
+		return PTR_ERR(parent_clk);
+	parent = __clk_get_name(parent_clk);
+
+	reg = of_iomap(dev->device_node, 0);
+	if (!reg)
+		return -ENOMEM;
+
+	onecell = kmalloc(struct_size(onecell, hws, BCM2835_AUX_CLOCK_COUNT),
+			  GFP_KERNEL);
+	if (!onecell)
+		return -ENOMEM;
+	onecell->num = BCM2835_AUX_CLOCK_COUNT;
+
+	gate = reg + BCM2835_AUXENB;
+	onecell->hws[BCM2835_AUX_CLOCK_UART] =
+		clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
+
+	onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
+		clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
+
+	onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
+		clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
+
+	return of_clk_add_hw_provider(dev->device_node, of_clk_hw_onecell_get,
+				      onecell);
+}
+
+static const struct of_device_id bcm2835_aux_clk_of_match[] = {
+	{ .compatible = "brcm,bcm2835-aux", },
+	{},
+};
+
+static struct driver_d bcm2835_aux_clk_driver = {
+	.name = "bcm2835-aux-clk",
+	.of_compatible = bcm2835_aux_clk_of_match,
+	.probe          = bcm2835_aux_clk_probe,
+};
+core_platform_driver(bcm2835_aux_clk_driver);
+
+MODULE_AUTHOR("Eric Anholt <eric at anholt.net>");
+MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver");
+MODULE_LICENSE("GPL");
-- 
2.30.2