rk3568 boot fail with TF-A binary
Alexander Shiyan
eagle.alexander923 at gmail.com
Fri Jun 28 06:56:57 PDT 2024
I changed the patch to reflect this for rk3568 rather than rk3588.
The patch doesn't help. I tried it with and without the
CONFIG_DIGEST_SHA256_ARM64_CE option.
...
> >>> I'm trying to use the open source TF-A implementation for the Rockchip
> >>> rk3568 CPU:
> >>> https://github.com/ARM-software/arm-trusted-firmware/commit/9fd9f1d024872b440e3906eded28037330b6f422
...
> >> Assuming this stack trace is accurate, it looks like the crypto extensions
> >> use may upset the CPU? Do you have CONFIG_DIGEST_SHA256_ARM64_CE enabled?
> >> Does this issue happen when you disable it?
> >
> > The error is still here. New log (without CONFIG_DIGEST_SHA256_ARM64_CE) below.
> >
> >> Did you call rk3588_lowlevel_init() in your entry point?
> > RK3568 :)
> > Yes, it called from rk3568_barebox_entry().
> >
> >
> > Board: Diasom DS-RK3568-EVB
> > deep-probe: supported due to diasom,ds-rk3568-evb
> > rockchip-dmc memory-controller.of: Detected memory size: 0x0000000200000000
> > netconsole: registered as netconsole-1
> > rk808 rk8090: chip id: 0x8090
> > vdd_npu: Bringing 500000uV into 850000-850000uV
> > vdda0v9_image: Bringing 600000uV into 900000-900000uV
> > vcca1v8_image: Bringing 600000uV into 1800000-1800000uV
> > rockchip_saradc fe720000.saradc at fe720000.of: registered as aiodev0
> > Boot source: usb, instance 0
> > psci psci.of: detected version 1.1
> > xHCI xHCI0: USB XHCI 1.10
> > mdio_bus: miibus0: probed
> > dw_mmc fe2b0000.mmc at fe2b0000.of: registered as mmc0
> > rk3568-dwcmshc-sdhci fe310000.mmc at fe310000.of: registered as mmc1
> > mmc1: detected MMC card version 5.1
> > mmc1: registered mmc1.boot0
> > mmc1: registered mmc1.boot1
> > mmc1: registered mmc1
> > mdio_bus: miibus1: probed
> > Setup Machine ID from EMMC serial: 30948368
> > Unknown/Uncategorized exception (ESR 0x02000000) at 0xbf96b7282ba34bf3
> > elr: 00000000efd7da48 lr : 00000000efd7d7e0
> > x0 : 00000000afdc1b10 x1 : 00000000afdc1b70
> > x2 : 0000000000000000 x3 : 0000000000000020
> > x4 : 0000000000000000 x5 : 00000000efff7dd8
> > x6 : 00000000ca62c1d6 x7 : 0000000000000000
> > x8 : 00000000afdc1b68 x9 : 0000000000000000
> > x10: 0000000000000000 x11: 00000000fffffff6
> > x12: 00000000fffffff6 x13: 0000000000000020
> > x14: 0000000000000000 x15: 0000000000000003
> > x16: 00000000efff7968 x17: 0000000000000003
> > x18: 00000000efff7ef0 x19: 0000000000000001
> > x20: 00000000afdc1b30 x21: 00000000afdc1b10
> > x22: 00000000afdc1b30 x23: 00000000ef600000
> > x24: 0000000000b35a40 x25: 0000000000080051
> > x26: 0000000000106858 x27: 00000000effe0000
> > x28: 0000000000000000 x29: 00000000efff7e40
> >
> > Call trace:
> > [<efd7da48>] (sha1_ce_transform+0x64/0x224) from [<efd7d8b0>]
> > (sha1_ce_final+0xbc/0x114)
> > [<efd7d8b0>] (sha1_ce_final+0xbc/0x114) from [<efd0297c>]
> > (machine_id_set_globalvar+0x7c/0x100)
> > [<efd0297c>] (machine_id_set_globalvar+0x7c/0x100) from [<efd01adc>]
> > (start_barebox+0x60/0x8c)
> > [<efd01adc>] (start_barebox+0x60/0x8c) from [<efd7bf1c>]
> > (barebox_non_pbl_start+0x11c/0x150)
> > [<efd7bf1c>] (barebox_non_pbl_start+0x11c/0x150) from [<efd0000c>]
> > (__bare_init_start+0x0/0x14)
> > [<efd0000c>] (__bare_init_start+0x0/0x14) from [<00b01d8c>] (0xb01d8c)
> > [<00b01d8c>] (0xb01d8c) from [<00b01640>] (0xb01640)
> > panic: unhandled exception
> > ### ERROR ### Please RESET the board ###
>
> I expect that without CONFIG_DIGEST_SHA1_ARM64_CE, the crash goes away?
> If yes, can you try out the patch I just Cc'd you on?
More information about the barebox
mailing list