iMX27 clock settings

Igor Trevisan igt1972 at gmail.com
Wed Feb 15 09:59:17 EST 2012


>
> One thing that might be interesting in such cases is the output of
> the dump_clocks command.

It's a useful debug command!
Here it is its output:

barebox:/ dump_clocks
chip id: [2,882,1,01d]
mpll:     600000000 Hz
spll:     240000000 Hz
arm:      400000000 Hz
perclk1:   20000000 Hz
perclk2:   40000000 Hz
perclk3:  100000000 Hz
perclk4:   40000000 Hz
clkin26:   26000000 Hz
ahb:      133333333 Hz
ipg:       66666666 Hz
barebox:/

This is what I get after the last configuration I tried:

writel(0x00262C15, MPCTL0)	
writel(0x040C2403, SPCTL0)	
writel(0x33F30207, CSCR)	/* Use DIV3 and AHBDIV=10 */

We have three different boards using iMX27L; on two of them
Barebox with this setting runs properly, on the third we frequently
see the system hanging (cyclic restarts).
Note: I have the same results with:
writel(0x33F30307, CSCR)	/* Use DIV3 and AHBDIV=11 */

Best regards,
I.



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