[PATCH v2] RISC-V: Don't trust V from the riscv,isa DT property on T-Head CPUs

[Rémi Denis-Courmont]

Le torstaina 13. heinäkuuta 2023, 21.47.29 EEST Rémi Denis-Courmont a écrit :
>         __asm__ (
>                 "vsetvli zero, zero, e8, m1, ta, ma\n"
>                 "csrr   %1, vtype\n" : "=r" (vtype) : "r" (0xC0));

The input operand is obviously bogus left-over, sorry.

-- 
Rémi Denis-Courmont
http://www.remlab.net/