[PATCH 2/2] mtd: spi-nor: Support SPI_NOR_DUAL_READ on Micron mt25qu02g.

David Clear dac2 at pensando.io
Fri Jul 17 14:00:12 EDT 2020

On Fri, Jul 17, 2020 at 3:33 AM <Tudor.Ambarus at microchip.com> wrote:
> On 7/17/20 12:16 AM, David Clear wrote:
> > The Micron mt25qu02g supports both x2 and x4 transactions.  Add the
> > SPI_NOR_DUAL_READ to its spi_nor_ids[] table entry.
> In spi_nor_select_read() we select the fastest read. Since this flash
> supports Quad Read, the Dual Read will never get selected. As of now,
> there is no benefit in adding SPI_NOR_DUAL_READ when SPI_NOR_QUAD_READ
> is specified.

Ok, I've got this now:  I went back and did some more testing with different
spi-rx-bus-width properties and I see it's redundant to specify both DUAL and
QUAD in the flash description.  Thanks for pointing out my error. I learned
something new.

I withdraw this patch and will work on getting the Macronix patch cleaned up and
tests documented.


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