[PATCH v3 3/3] spi: xilinx: use device property accessors.

[Abdurrahman Hussain]

> On Jan 19, 2026, at 8:50 AM, Mark Brown <broonie at kernel.org> wrote:
> 
> On Mon, Jan 19, 2026 at 08:47:17AM -0800, Abdurrahman Hussain wrote:
>>> On Jan 19, 2026, at 8:32 AM, Mark Brown <broonie at kernel.org> wrote:
>>> On Mon, Jan 19, 2026 at 07:06:24AM +0000, Abdurrahman Hussain via B4 Relay wrote:
> 
>>>> - of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
>>>> -  &num_cs);
>>>> - ret = of_property_read_u32(pdev->dev.of_node,
>>>> -   "xlnx,num-transfer-bits",
>>>> -   &bits_per_word);
>>>> + device_property_read_u32(&pdev->dev, "xlnx,num-ss-bits",
>>>> + &num_cs);
>>>> + ret = device_property_read_u32(&pdev->dev,
>>>> +       "xlnx,num-transfer-bits",
>>>> +       &bits_per_word);
> 
>>> Are these bindings appropraite for ACPI systems?
> 
>> Yes, the Xilinx IP blocks are memory mapped and work exactly the same on ACPI as they do on DT.
> 
> That does not answer the question at all.  Is it appropriate to
> configure an ACPI system in this way?

I am not sure I understood your question. What do you mean by “appropriate”?
This is following the same guidelines as outlined in 
https://www.kernel.org/doc/html/v6.7/firmware-guide/acpi/enumeration.html