[PATCH v3 3/3] spi: xilinx: use device property accessors.
Mark Brown
broonie at kernel.org
Mon Jan 19 08:50:13 PST 2026
On Mon, Jan 19, 2026 at 08:47:17AM -0800, Abdurrahman Hussain wrote:
> > On Jan 19, 2026, at 8:32 AM, Mark Brown <broonie at kernel.org> wrote:
> > On Mon, Jan 19, 2026 at 07:06:24AM +0000, Abdurrahman Hussain via B4 Relay wrote:
> >> - of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
> >> - &num_cs);
> >> - ret = of_property_read_u32(pdev->dev.of_node,
> >> - "xlnx,num-transfer-bits",
> >> - &bits_per_word);
> >> + device_property_read_u32(&pdev->dev, "xlnx,num-ss-bits",
> >> + &num_cs);
> >> + ret = device_property_read_u32(&pdev->dev,
> >> + "xlnx,num-transfer-bits",
> >> + &bits_per_word);
> > Are these bindings appropraite for ACPI systems?
> Yes, the Xilinx IP blocks are memory mapped and work exactly the same on ACPI as they do on DT.
That does not answer the question at all. Is it appropriate to
configure an ACPI system in this way?
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