[PATCH v3 00/22] riscv: Memory type control for platforms with physical memory aliases
patchwork-bot+linux-riscv at kernel.org
patchwork-bot+linux-riscv at kernel.org
Fri Dec 19 00:10:01 PST 2025
Hello:
This series was applied to riscv/linux.git (fixes)
by Andrew Morton <akpm at linux-foundation.org>:
On Wed, 12 Nov 2025 17:45:13 -0800 you wrote:
> On some RISC-V platforms, including StarFive JH7100 and ESWIN EIC7700,
> DRAM is mapped to multiple physical address ranges, with each alias
> having a different set of statically-determined Physical Memory
> Attributes (PMAs), such as cacheability. Software can alter the PMAs for
> a page by selecting a PFN from the corresponding physical address range.
> On these platforms, this is the only way to allocate noncached memory
> for use with noncoherent DMA.
>
> [...]
Here is the summary with links:
- [v3,01/22] mm/ptdump: replace READ_ONCE() with standard page table accessors
https://git.kernel.org/riscv/c/11119b19f62d
- [v3,02/22] mm: replace READ_ONCE() with standard page table accessors
https://git.kernel.org/riscv/c/c0efdb373c3a
- [v3,03/22] mm/dirty: replace READ_ONCE() with pudp_get()
https://git.kernel.org/riscv/c/b4e53984f240
- [v3,04/22] perf/events: replace READ_ONCE() with standard page table accessors
(no matching commit)
- [v3,05/22] mm: Move the fallback definitions of pXXp_get()
(no matching commit)
- [v3,06/22] mm: Always use page table accessor functions
(no matching commit)
- [v3,07/22] checkpatch: Warn on page table access without accessors
(no matching commit)
- [v3,08/22] mm: Allow page table accessors to be non-idempotent
(no matching commit)
- [v3,09/22] riscv: hibernate: Replace open-coded pXXp_get()
(no matching commit)
- [v3,10/22] riscv: mm: Always use page table accessor functions
(no matching commit)
- [v3,11/22] riscv: mm: Simplify set_p4d() and set_pgd()
(no matching commit)
- [v3,12/22] riscv: mm: Deduplicate _PAGE_CHG_MASK definition
(no matching commit)
- [v3,13/22] riscv: ptdump: Only show N and MT bits when enabled in the kernel
(no matching commit)
- [v3,14/22] riscv: mm: Fix up memory types when writing page tables
(no matching commit)
- [v3,15/22] riscv: mm: Expose all page table bits to assembly code
(no matching commit)
- [v3,16/22] riscv: alternative: Add an ALTERNATIVE_3 macro
(no matching commit)
- [v3,17/22] riscv: alternative: Allow calls with alternate link registers
(no matching commit)
- [v3,18/22] riscv: Fix logic for selecting DMA_DIRECT_REMAP
(no matching commit)
- [v3,19/22] dt-bindings: riscv: Describe physical memory regions
(no matching commit)
- [v3,20/22] riscv: mm: Use physical memory aliases to apply PMAs
(no matching commit)
- [v3,21/22] riscv: dts: starfive: jh7100: Use physical memory ranges for DMA
(no matching commit)
- [v3,22/22] riscv: dts: eswin: eic7700: Use physical memory ranges for DMA
(no matching commit)
You are awesome, thank you!
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