[PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for Renesas RZ/Five SoC and SMARC EVK

[Biju Das]

> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> Sent: 27 July 2022 13:37
> To: Biju Das <biju.das.jz at bp.renesas.com>; Lad, Prabhakar
> <prabhakar.csengg at gmail.com>
> Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj at bp.renesas.com>;
> Geert Uytterhoeven <geert+renesas at glider.be>; Magnus Damm
> <magnus.damm at gmail.com>; Rob Herring <robh+dt at kernel.org>; Krzysztof
> Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Paul Walmsley
> <paul.walmsley at sifive.com>; Palmer Dabbelt <palmer at dabbelt.com>; Albert
> Ou <aou at eecs.berkeley.edu>; Anup Patel <anup at brainfault.org>; Linux-
> Renesas <linux-renesas-soc at vger.kernel.org>; open list:OPEN FIRMWARE AND
> FLATTENED DEVICE TREE BINDINGS <devicetree at vger.kernel.org>; linux-riscv
> <linux-riscv at lists.infradead.org>; LKML <linux-kernel at vger.kernel.org>
> Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding
> documentation for Renesas RZ/Five SoC and SMARC EVK
> 
> On 27/07/2022 14:21, Biju Das wrote:
> > Hi,
> >
> >> Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding
> >> documentation for Renesas RZ/Five SoC and SMARC EVK
> >>
> >> On 27/07/2022 13:37, Lad, Prabhakar wrote:
> >>>>>>
> >>>>> I did run the dtbs_check test as per your suggestion (below is the
> >>>>> log) and didn't see "no matching schema error"
> >>>>>
> >>>>
> >>>> So you do not see any errors at all. Then it does not work, does
> it?
> >>>>
> >>> Right I reverted my changes I can see it complaining, dtb_check
> >>> seems to have returned false positive in my case.
> >>>
> >>> What approach would you suggest to ignore the schema here?
> >>
> >> I don't think currently it would work with your approach. Instead,
> >> you should select here all SoCs which the schema should match.
> >>
> >> This leads to my previous concern - you use the same SoC compatible
> >> for two different architectures and different SoCs: ARMv8 and RISC-V.
> >
> > Or is it same SoC(R9A07G043) based on two different CPU architectures
> > (ARMv8 and RISC-V)
> 
> Then it is not the same SoC! Same means same, identical. CPU
> architecture is one of the major differences, which means it is not the
> same.

Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of
differences for SoC based on ARMV8 and RISC-V which has separate compatible like
r9a07g043u11 and r9a07g043f01?

> 
> > Using same SoM and Carrier board?
> 
> It's like saying PC with x86 and ARMv8 board are the same because they
> both use same "PC chassis".

What I meant is board based on Family SoC(R9A07G043) that is either based on ARMv8 or
RISC-V cpu architecture.

Cheers,
Biju