[PATCH 4/4] phy: qcom-qmp-combo: use v6 registers in v6 regs layout

[Dmitry Baryshkov]

On Wed, 6 Sept 2023 at 11:01, Neil Armstrong <neil.armstrong at linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.
>
> Why that if the registers are the same as v5 ?

Because otherwise it is too easy to use the incorrect register when
adding a new register to the regs layout. Been there.

>
> Neil
>
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> > ---
> >   drivers/phy/qualcomm/phy-qcom-qmp-combo.c      | 12 ++++++------
> >   drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h |  2 ++
> >   drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h     |  4 ++++
> >   3 files changed, 12 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index bff6231d7de3..9c71a132afea 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -194,14 +194,14 @@ static const unsigned int qmp_v5_5nm_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> >   };
> >
> >   static const unsigned int qmp_v6_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > -     [QPHY_SW_RESET]                 = QPHY_V5_PCS_SW_RESET,
> > -     [QPHY_START_CTRL]               = QPHY_V5_PCS_START_CONTROL,
> > -     [QPHY_PCS_STATUS]               = QPHY_V5_PCS_PCS_STATUS1,
> > -     [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V5_PCS_POWER_DOWN_CONTROL,
> > +     [QPHY_SW_RESET]                 = QPHY_V6_PCS_SW_RESET,
> > +     [QPHY_START_CTRL]               = QPHY_V6_PCS_START_CONTROL,
> > +     [QPHY_PCS_STATUS]               = QPHY_V6_PCS_PCS_STATUS1,
> > +     [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V6_PCS_POWER_DOWN_CONTROL,
> >
> >       /* In PCS_USB */
> > -     [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V5_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > -     [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V5_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> > +     [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > +     [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> >
> >       [QPHY_COM_RESETSM_CNTRL]        = QSERDES_V6_COM_RESETSM_CNTRL,
> >       [QPHY_COM_C_READY_STATUS]       = QSERDES_V6_COM_C_READY_STATUS,
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 7c16af0b1cc3..0d0089898240 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -8,6 +8,8 @@
> >
> >   /* Only for QMP V6 PHY - USB3 have different offsets than V5 */
> >   #define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1                0x00
> > +#define QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL                0x08
> > +#define QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR               0x14
> >   #define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL    0x18
> >   #define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2   0x3c
> >   #define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L         0x40
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > index c95d3fabd108..496c36522e55 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> > @@ -7,6 +7,10 @@
> >   #define QCOM_PHY_QMP_PCS_V6_H_
> >
> >   /* Only for QMP V6 PHY - USB/PCIe PCS registers */
> > +#define QPHY_V6_PCS_SW_RESET                 0x000
> > +#define QPHY_V6_PCS_PCS_STATUS1                      0x014
> > +#define QPHY_V6_PCS_POWER_DOWN_CONTROL               0x040
> > +#define QPHY_V6_PCS_START_CONTROL            0x044
> >   #define QPHY_V6_PCS_LOCK_DETECT_CONFIG1             0x0c4
> >   #define QPHY_V6_PCS_LOCK_DETECT_CONFIG2             0x0c8
> >   #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3             0x0cc
>


-- 
With best wishes
Dmitry