[PATCH V5 09/15] spi: Add stacked and parallel memories support in SPI core

Tudor Ambarus tudor.ambarus at linaro.org
Tue Mar 7 03:47:27 PST 2023

On 3/7/23 11:37, Mahapatra, Amit Kumar wrote:
>> -----Original Message-----
>> From: Tudor Ambarus <tudor.ambarus at linaro.org>
>> Sent: Tuesday, March 7, 2023 9:51 AM
>> To: Mahapatra, Amit Kumar <amit.kumar-mahapatra at amd.com>;
>> broonie at kernel.org; miquel.raynal at bootlin.com; richard at nod.at;
>> vigneshr at ti.com; jic23 at kernel.org; pratyush at kernel.org
>> Cc: linux-spi at vger.kernel.org; linux-mtd at lists.infradead.org; linux-
>> kernel at vger.kernel.org
>> Subject: Re: [PATCH V5 09/15] spi: Add stacked and parallel memories
>> support in SPI core
>> There were too many recipients in To and Cc and I couldn't reply to the
>> email. I whipped off the Cc filed and most of the people from To and added
>> the lists in Cc.
>> On 3/6/23 17:21, Amit Kumar Mahapatra wrote:	
>>> Multi CS support using GPIO is not tested due to unavailability of
>>> necessary hardware setup.
>> Please don't add code that is not used or tested.
> During our discussion on the RFC, Mark had suggested to add multi-cs support
> via GPIO as well. We had agreed to add multi-cs support via GPIO, but had also
> mentioned that we don't have a hardware setup to test the CS GPIO use case.
> https://lore.kernel.org/linux-arm-kernel/BN7PR12MB2802E2A9079E505932832270DC979@BN7PR12MB2802.namprd12.prod.outlook.com/

Ok, his call then.

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