[PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information

[Dhruva Gole]

Hi,

On Feb 06, 2024 at 15:57:19 +0100, Markus Schneider-Pargmann wrote:
> Add nvmem-cells to describe chip information like chipvariant and
> chipspeed. If nvmem-cells are used, the syscon property is not necessary
> anymore.
> 
> Signed-off-by: Markus Schneider-Pargmann <msp at baylibre.com>
> Acked-by: Andrew Davis <afd at ti.com>
> ---
>  .../bindings/opp/operating-points-v2-ti-cpu.yaml | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> index 02d1d2c17129..b1881a0834fe 100644
> --- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> @@ -34,6 +34,14 @@ properties:
>        points to syscon node representing the control module
>        register space of the SoC.
>  
> +  nvmem-cells:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> +  nvmem-cell-names:
> +    items:
> +      - const: chipvariant
> +      - const: chipspeed
> +
>    opp-shared: true
>  
>  patternProperties:
> @@ -55,7 +63,13 @@ patternProperties:
>  
>  required:
>    - compatible
> -  - syscon
> +
> +oneOf:
> +  - required:
> +      - syscon
> +  - required:
> +      - nvmem-cells
> +      - nvmem-cell-names

Reviewed-by: Dhruva Gole <d-gole at ti.com>


-- 
Best regards,
Dhruva Gole <d-gole at ti.com>