[PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information

Krzysztof Kozlowski krzysztof.kozlowski at linaro.org
Sat Feb 17 06:27:21 PST 2024


On 15/02/2024 09:24, Krzysztof Kozlowski wrote:
> On 06/02/2024 15:57, Markus Schneider-Pargmann wrote:
>> Add nvmem-cells to describe chip information like chipvariant and
>> chipspeed. If nvmem-cells are used, the syscon property is not necessary
>> anymore.
>>
>> Signed-off-by: Markus Schneider-Pargmann <msp at baylibre.com>
>> Acked-by: Andrew Davis <afd at ti.com>
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>

NAK

And unreviewed. Please carry on:

Nacked-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>

I found older discussion with Rob, who pointed out that one device
cannot have entirely different programming models, so this patchset has
the same errors. None of the previous issues were fixed here.

Best regards,
Krzysztof




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