[PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information
Krzysztof Kozlowski
krzysztof.kozlowski at linaro.org
Sat Feb 17 06:27:38 PST 2024
On 06/02/2024 15:57, Markus Schneider-Pargmann wrote:
> Add nvmem-cells to describe chip information like chipvariant and
> chipspeed. If nvmem-cells are used, the syscon property is not necessary
> anymore.
>
> Signed-off-by: Markus Schneider-Pargmann <msp at baylibre.com>
> Acked-by: Andrew Davis <afd at ti.com>
> ---
> .../bindings/opp/operating-points-v2-ti-cpu.yaml | 16 +++++++++++++++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> index 02d1d2c17129..b1881a0834fe 100644
> --- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> @@ -34,6 +34,14 @@ properties:
> points to syscon node representing the control module
> register space of the SoC.
>
> + nvmem-cells:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
Why redefining the type?
Best regards,
Krzysztof
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