[PATCH v8 3/4] ata: Add APM X-Gene SoC SATA host controller driver

[Tejun Heo]

On Tue, Jan 14, 2014 at 08:21:28AM -0800, Loc Ho wrote:
> In the ISR, the AHCI library code reads the CI register and then
> performs XOR to determine which commands are completed. Then it goes
> and processes the completed command(s). I am worry that the process of
> processing the completed command(s), the upper layer may act on the
> data before the data arrived at the DDR/cache. In answering your
> question, yes.

Is this an explicit errata on the hardware?  Have you actually
observed this or is it just a speculation?

-- 
tejun