RFC: Zynq Clock Controller

Sören Brinkmann soren.brinkmann at xilinx.com
Wed Mar 6 12:27:46 EST 2013


Hi Jan,
 
what a small world. Good to hear from you.

On Wed, Mar 06, 2013 at 12:51:21PM +0100, Jan Lübbe wrote:
> Hi Sören,
> 
> On Tue, 2013-03-05 at 12:04 -0800, Sören Brinkmann wrote:
> > For this reasons, I'd like to propose moving Zynq into the same
> > direction. I.e. adding a clock controller with the following DT
> > description (details may change but the general idea should become
> > clear):
> > 	clkc: clkc {
> >                 #clock-cells = <1>;
> >                 compatible = "xlnx,ps7-clkc";
> >                 ps_clk_frequency = <33333333>;	# board x-tal
> >                 # optional props
> >                 gem0_emio_clk_freq = <125000000>;
> >                 gem1_emio_clk_freq = <50000000>;
> >                 can_mio_clk_freq_xx = <1234>; # this is possible 54 times with xx = 00..53
> >         };
> 
> The clock controller should only contain properties for input frequency
> (which can obviously not be calculated at run-time).
> 
> Are the gem*, can* properties inputs? If they are actually outputs, the
> corresponding frequencies should be requested by the clock consumers and
> not hard-coded in DT.
They are inputs. GEM and CAN have the option to be clocked through (E)MIO pins, i.e. some external clock input which cannot be derived from ps_clk like all other clocks. I plan to register a fixed rate, root clock for each of those properties, if present.

> 
> Please keep in mind that DT properties use dashes instead of
> underscores.
Okay, I'll make that substitution.

	Sören





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