mxs: enable phy-clock in the driver?

Lothar Waßmann LW at KARO-electronics.de
Mon Jan 9 02:05:14 EST 2012


Hi,

Shawn Guo writes:
> On Mon, Jan 09, 2012 at 07:40:47AM +0100, Lothar Waßmann wrote:
> > The TX28 derives its PHY clock from the ENET_CLK pin of the
> > processor. Thus the CLK_ENET_TIME should be enabled by the driver as
> > mentioned in <20120108033238.GA19721 at S2101-09.ap.freescale.net>
> > 
> Can you give a web link for that message?
> 
It's your own email from "Sun, 8 Jan 2012 11:32:40 +0800" with the
subject "Re: MX28 fec clock frequency":
http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/079556.html


Lothar Waßmann
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