mxs: enable phy-clock in the driver?

[Shawn Guo]

On Mon, Jan 09, 2012 at 08:05:14AM +0100, Lothar Waßmann wrote:
> Hi,
> 
> Shawn Guo writes:
> > On Mon, Jan 09, 2012 at 07:40:47AM +0100, Lothar Waßmann wrote:
> > > The TX28 derives its PHY clock from the ENET_CLK pin of the
> > > processor. Thus the CLK_ENET_TIME should be enabled by the driver as
> > > mentioned in <20120108033238.GA19721 at S2101-09.ap.freescale.net>
> > > 
> > Can you give a web link for that message?
> > 
> It's your own email from "Sun, 8 Jan 2012 11:32:40 +0800" with the
> subject "Re: MX28 fec clock frequency":
> http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/079556.html
> 
Ah, yes.  But what I said there is the CLK_ENET_TIME should be enabled
by PTP support, not the need of clocking external phy required by
particular board design.

-- 
Regards,
Shawn