[PATCH v2 2/3] ARM: iwmmxt: Port problematic iwmmxt support code to v7/Thumb-2

[Nicolas Pitre]

On Fri, 9 Sep 2011, Jon Medhurst (Tixy) wrote:

> On Thu, 2011-09-08 at 11:49 -0700, Eric Miao wrote:
> > So the problem is really when compiling this file with existing toolchain,
> > it's downgrading to v5 compatible mode, and the instruction below
> > 
> > sub pc, lr, r1, lsr #32
> > 
> > wouldn't be encoded when building a THUMB2 kernel. Considering the
> > r1, lsr #32 is actually to create an explicit data dependency of the previous
> > co-processor instruction, would it be one option to rewrite this as something
> > like:
> > 
> > mov r1, r1
> > mov pc, lr
> 
> That doesn't include a data dependency of PC on R1, so it's possible for
> MOV PC, LR and subsequent instructions to be executed before MOV R1, R1
> has completed. We would want...
> 
> add lr, lr, r1, lsr #32
> mov pc, lr

But isn't the first insn unavailable with Thumb2?

Maybe something like:

	sub	r1, r1, r1
	add	pc, lr, r1


Nicolas