[PATCH v3] dmaengine: add CSR SiRFprimaII DMAC driver

[Linus Walleij]

On Mon, Oct 17, 2011 at 3:57 PM, Vinod Koul <vinod.koul at intel.com> wrote:

>> +     if (sdesc->cyclic) {
>> +             writel((1 << cid) | 1 << (cid + 16) |
>> +                     readl_relaxed(sdma->base + SIRFSOC_DMA_CH_LOOP_CTRL),
>> +                     sdma->base + SIRFSOC_DMA_CH_LOOP_CTRL);
>> +             schan->happened_cyclic = schan->completed_cyclic = 0;
>> +     }
>
> any reason why we have mixed use of writel_relaxes and writel?
> Shouldn't all the DMA register writes be done only using writel?

We has a lengthy discussion on the subject here:
http://marc.info/?l=linux-arm-kernel&m=130588591415130&w=2

Yours,
Linus Walleij