[RFC PATCH 2/2] ARMv7: Invalidate the TLB before freeing page tables
Russell King - ARM Linux
linux at arm.linux.org.uk
Fri Mar 11 14:24:55 EST 2011
On Fri, Mar 11, 2011 at 05:32:58PM +0000, Catalin Marinas wrote:
> On Wed, 2011-03-09 at 18:35 +0000, Russell King - ARM Linux wrote:
> > On Wed, Mar 09, 2011 at 03:40:05PM +0000, Catalin Marinas wrote:
> > > The above call to tlb_add_flush() would only add a PAGE_SIZE. But
> > > since we free an entire PTE, shouldn't the range cover addr ..
> > > addr+PTRS_PER_PTE*PAGE_SIZE?
> > Why do we need to? We're not flushing away the individual PTE entries
> > when we remove an entire page table - we will have already walked the
> > page table removing those entries, which will already have been added.
> Ah, I missed the fact that tlb_flush() invalidates the whole TLB when
> there is no tlb->vma (the shift_arg_pages case). We could optimise this
> to add the range covered by the PTE page and avoid the !tlb->vma check
> (and a flush_tlb_mm), though not sure it's worth.
If we're removing pte entries then tlb->vma is non-NULL. Please look at
the comments - I've documented the three modes of use there along with
how things are setup for each of those modes, and what we do with each.
I don't add comments just for the hell of it.
> > This code is to cover the case with LPAE where we need to flush out the
> > L1 entries. It's nothing to do with the TLB itself.
> This would happen even with the classic page tables on Cortex-A15, L1
> entries are cached.
That's why its there at pte level. On classic page tables there's no pmds
or puds to consider.
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