[PATCH 2a/5] Remove unsafe clock values from omap1_defconfig

Janusz Krzysztofik jkrzyszt at tis.icnet.pl
Thu Dec 1 14:23:04 EST 2011

On Thursday 01 of December 2011 at 20:04:55, Tony Lindgren wrote:
> From: Tony Lindgren <tony at atomide.com>
> Date: Thu, 1 Dec 2011 11:00:11 -0800
> Subject: [PATCH] ARM: OMAP1: Fix reprogramming of DPLL1 for systems that boot at rates below 60MHz
> Commit e9b7086b80c4d9e354f4edc9e280ae85a60df408 (ARM: OMAP: Fix
> reprogramming of dpll1 rate) fixed a regression for systems that
> did not rely on bootloader set rates.
> However, it also introduced a new problem where the rates selected
> in .config would not take affect as omap1_select_table_rate
> currently refuses to reprogram DPLL1 if it's already initialized.
> This was not a problem earlier, as the reprogramming was done
> earlier with ck_dpll1_p->rate uninitialized.
> Fix this by forcing the reprogramming on systems booting at rates
> below 60MHz. Note that the long term fix is to make the rates
> SoC specific later on.
> Thanks for Janusz Krzysztofik <jkrzyszt at tis.icnet.pl> for figuring
> this one out.
> Reported-by: Janusz Krzysztofik <jkrzyszt at tis.icnet.pl>
> Signed-off-by: Tony Lindgren <tony at atomide.com>

Acked-by: Janusz Krzysztofik <jkrzyszt at tis.icnet.pl>

However, this way or another, we are back to your mentioned problem of 
omap1_defconfig always switching to 216 MHz, I'm afraid. Then, 2a/5 v1 
"Remove unsafe clock values from omap1_defconfig" can still be helpful.

Anyway, I'm resending (refreshed) 2/5 and 5/5 as rc fixes as you 
suggested before, 1/5 "ARM: OMAP1: Fix dpll1 default rate reprogramming 
method" intended for next, and 2a/5 v2 "ARM: OMAP1: select clock rate by 
CPU type" also for next but as an RFC. 


> diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
> index 1297bb5..3f30561 100644
> --- a/arch/arm/mach-omap1/clock_data.c
> +++ b/arch/arm/mach-omap1/clock_data.c
> @@ -930,6 +930,9 @@ void __init omap1_clk_late_init(void)
>  	if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE)
>  		return;
> +	/* System booting at unusable rate, force reprogramming of DPLL1 */
> +	ck_dpll1_p->rate = 0;
> +
>  	/* Find the highest supported frequency and enable it */
>  	if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
>  		pr_err("System frequencies not set, using default. Check your config.\n");
> --
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