[PATCH 12/74] ST SPEAr: Correcting SOC Config base address for spear320

Mon Sep 6 18:58:04 EDT 2010

Hi,

	not relased to this patch series

Best Regards,
J.
On 16:08 Mon 30 Aug     , Viresh KUMAR wrote:
> Signed-off-by: Viresh Kumar <viresh.kumar at st.com>
> ---
>  arch/arm/mach-spear3xx/include/mach/spear320.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
> index cacf17a..53677e4 100644
> --- a/arch/arm/mach-spear3xx/include/mach/spear320.h
> +++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
> @@ -62,7 +62,7 @@
>  #define SPEAR320_SMII1_BASE		0xAB000000
>  #define SPEAR320_SMII1_SIZE		0x01000000
>  
> -#define SPEAR320_SOC_CONFIG_BASE	0xB4000000
> +#define SPEAR320_SOC_CONFIG_BASE	0xB3000000
>  #define SPEAR320_SOC_CONFIG_SIZE	0x00000070
>  /* Interrupt registers offsets and masks */
>  #define INT_STS_MASK_REG		0x04
> -- 
> 1.7.2.2
> 
> 
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