[PATCH] sdhci: support hardware clock gating in the SD layer

[Philip Rakity]

Define callback (platform_hw_clk_gate) that is called when H/W clock gating
is defined. The adaptation layer is responsible for enabling hw clock
gating by:

a) setting mmc->caps |=3D MMC_CAP_HW_CLOCK_GATING to enable h/w gating
b) defining the callback.

Signed-off-by: Philip Rakity <prakity at marvell.com>
Signed-off-by: Mark F. Brown <markb at marvell.com>
Tested-by: Philip Rakity <prakity at marvell.com>
---
 drivers/mmc/host/sdhci.c |    6 ++++++
 drivers/mmc/host/sdhci.h |    1 +
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ff9d5f0..dcfbe83 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1203,6 +1203,12 @@ static void sdhci_set_ios(struct mmc_host *mmc, stru=
ct mmc_ios *ios)
 	if (host->ops->platform_send_init_74_clocks)
 		host->ops->platform_send_init_74_clocks(host, ios->power_mode);
=20
+#ifdef CONFIG_MMC_CLKGATE
+	if ((mmc->caps & MMC_CAP_HW_CLOCK_GATING)
+		&& host->ops->platform_hw_clk_gate)
+			host->ops->platform_hw_clk_gate(host);
+#endif
+
 	/*
 	 * If your platform has 8-bit width support but is not a v3 controller,
 	 * or if it requires special setup code, you should implement that in
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 84292e0..cbd63e2 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -241,6 +241,7 @@ struct sdhci_ops {
 	void	(*platform_reset_exit)(struct sdhci_host *host, u8 mask);
 	unsigned int	(*get_f_max_clock)(struct sdhci_host *host);
 	void	(*platform_specific_delay)(struct sdhci_host *host);
+	void	(*platform_hw_clk_gate)(struct sdhci_host *host);
 };
=20
 #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
--=20
1.6.0.4

--_002_744F5B54A6874BF09F41A7DE470CB48Bmarvellcom_
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	filename="0020-sdhci-support-hardware-clock-gating-in-the-SD-layer.patch";
	size=1927; creation-date="Tue, 21 Dec 2010 23:11:00 GMT";
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