[PATCH v2 3/9] clk: meson8b: put dividers and muxes in tables
Michael Turquette
mturquette at baylibre.com
Tue Mar 21 16:10:11 PDT 2017
Quoting Jerome Brunet (2017-03-09 02:41:48)
> Until now, there was only 1 divider and 1 mux declared for the meson8b
> platform. With the ongoing work on various system, including audio, this
> is about to change. Use the same approach as gates for dividers and muxes,
> putting them in tables to fix the register address at runtime.
>
> Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
Looks good to me.
Regards,
Mike
> ---
> drivers/clk/meson/meson8b.c | 22 ++++++++++++++++++----
> 1 file changed, 18 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
> index d1cc4d7cc8ff..2937443d4505 100644
> --- a/drivers/clk/meson/meson8b.c
> +++ b/drivers/clk/meson/meson8b.c
> @@ -582,6 +582,14 @@ static struct clk_gate *const meson8b_clk_gates[] = {
> &meson8b_ao_iface,
> };
>
> +static struct clk_mux *const meson8b_clk_muxes[] = {
> + &meson8b_mpeg_clk_sel,
> +};
> +
> +static struct clk_divider *const meson8b_clk_dividers[] = {
> + &meson8b_mpeg_clk_div,
> +};
> +
> static int meson8b_clkc_probe(struct platform_device *pdev)
> {
> void __iomem *clk_base;
> @@ -604,15 +612,21 @@ static int meson8b_clkc_probe(struct platform_device *pdev)
> /* Populate the base address for CPU clk */
> meson8b_cpu_clk.base = clk_base;
>
> - /* Populate the base address for the MPEG clks */
> - meson8b_mpeg_clk_sel.reg = clk_base + (u32)meson8b_mpeg_clk_sel.reg;
> - meson8b_mpeg_clk_div.reg = clk_base + (u32)meson8b_mpeg_clk_div.reg;
> -
> /* Populate base address for gates */
> for (i = 0; i < ARRAY_SIZE(meson8b_clk_gates); i++)
> meson8b_clk_gates[i]->reg = clk_base +
> (u32)meson8b_clk_gates[i]->reg;
>
> + /* Populate base address for muxes */
> + for (i = 0; i < ARRAY_SIZE(meson8b_clk_muxes); i++)
> + meson8b_clk_muxes[i]->reg = clk_base +
> + (u32)meson8b_clk_muxes[i]->reg;
> +
> + /* Populate base address for dividers */
> + for (i = 0; i < ARRAY_SIZE(meson8b_clk_dividers); i++)
> + meson8b_clk_dividers[i]->reg = clk_base +
> + (u32)meson8b_clk_dividers[i]->reg;
> +
> /*
> * register all clks
> * CLKID_UNUSED = 0, so skip it and start with CLKID_XTAL = 1
> --
> 2.9.3
>
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