[PATCH 0/6] arm: socfpga: agilex5: cleanup QSPI flash low level code

[Sascha Hauer]

On Wed, 06 May 2026 11:06:06 +0200, Michael Tretter wrote:
> On Agilex 5, barebox runs in the HPS (hard processor system) which needs
> to explicitly request QSPI flash access from the SDM (secure device
> manager). This request may be denied by the SDM. Furthermore, barebox
> needs to store the clock rate reported by the SDM.
> 
> Cleanup and refactor the code that handles the QSPI flash request from
> the SDM. This is a preparation for eventually reading a second stage
> boot loader from QSPI flash.
> 
> [...]

Applied, thanks!

[1/6] arm: socfpga: agilex5: add missing include soc64-regs.h
      https://git.pengutronix.de/cgit/barebox/commit/?id=1f4a856e0936 (link may not be stable)
[2/6] arm: socfgpa: agilex5: remove mailbox_s10 from barebox proper
      https://git.pengutronix.de/cgit/barebox/commit/?id=dc418389064d (link may not be stable)
[3/6] arm: socfpga: agilex5: extract function to request qspi access
      https://git.pengutronix.de/cgit/barebox/commit/?id=87a298eab713 (link may not be stable)
[4/6] arm: socfpga: mailbox_s10: keep clock rate in Hz
      https://git.pengutronix.de/cgit/barebox/commit/?id=2ee06bcf5410 (link may not be stable)
[5/6] arm: socfpga: mailbox_s10: add write_qspi_refclk helper
      https://git.pengutronix.de/cgit/barebox/commit/?id=5998c5c1b3ee (link may not be stable)
[6/6] arm: socfpga: agilex5: extract write_qspi_refclk from mailbox
      https://git.pengutronix.de/cgit/barebox/commit/?id=11daf34fa202 (link may not be stable)

Best regards,
-- 
Sascha Hauer <s.hauer at pengutronix.de>