[PATCH 3/6] arm: socfpga: agilex5: extract function to request qspi access

[Michael Tretter]

Requesting access to the QSPI flash access may actually fail due to the
firmware configuration. Tell the user about the failure, since other
features, for example, barebox environment in flash, may rely on QSPI
flash access.

Extract a helper function and print a warning, if QSPI flash access was
not granted.

Since requesting QSPI flash access is currently the only function that
uses the S10 mailbox, move socfgpa_mailbox_s10_init(), too.

Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
---
 arch/arm/mach-socfpga/atf.c | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/atf.c b/arch/arm/mach-socfpga/atf.c
index c7be4e11d2ea..3719bde0e8bb 100644
--- a/arch/arm/mach-socfpga/atf.c
+++ b/arch/arm/mach-socfpga/atf.c
@@ -12,6 +12,23 @@
 #include <mach/socfpga/soc64-sdram.h>
 #include <mach/socfpga/soc64-system-manager.h>
 
+static void socfpga_agilex5_qspi_init(void)
+{
+	int ret;
+
+	ret = socfpga_mailbox_s10_init();
+	if (ret) {
+		pr_warn("Failed to init s10 mailbox: %d\n", ret);
+		return;
+	}
+
+	ret = socfpga_mailbox_s10_qspi_open();
+	if (ret) {
+		pr_warn("Failed to request QSPI access: %d\n", ret);
+		return;
+	}
+}
+
 static void __noreturn agilex5_load_and_start_image_via_tfa(void)
 {
 	void *bl31 = (void *)AGILEX5_ATF_BL31_BASE_ADDR;
@@ -55,8 +72,7 @@ void __noreturn agilex5_barebox_entry(void *fdt)
 			writel(LCR_BKSE, SOCFPGA_UART0_ADDRESS + LCR);
 		agilex5_ddr_init_full();
 
-		socfpga_mailbox_s10_init();
-		socfpga_mailbox_s10_qspi_open();
+		socfpga_agilex5_qspi_init();
 
 		agilex5_load_and_start_image_via_tfa();
 		__builtin_unreachable();

-- 
2.47.3