[PATCH 6/8] clk: divider: use 64-bit division in _div_round_up and divider_get_val

[Ahmad Fatoum]

From: Ahmad Fatoum <a.fatoum at barebox.org>

The parent_rate + rate - 1 addition in DIV_ROUND_UP can overflow on
32-bit platforms. Use DIV_ROUND_UP_ULL, as Linux does since commit
9556f9dad8f5 ("clk: divider: handle integer overflow when dividing
large clock rates").

Fixes: 7d664f98d1ba ("clk: clk-divider: divider calculation in clk_set_rate needs DIV_ROUND_UP")
Fixes: b75025a39c77 ("clk: divider: Fix best div calculation for power-of-two and table dividers")
Reported-by: Claude:opus-4.6
Signed-off-by: Ahmad Fatoum <a.fatoum at barebox.org>
---
 drivers/clk/clk-divider.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 62d63ef39c7e..97dc9679c91c 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -161,7 +161,7 @@ static int _div_round_up(const struct clk_div_table *table,
 			 unsigned long parent_rate, unsigned long rate,
 			 unsigned long flags)
 {
-	int div = DIV_ROUND_UP(parent_rate, rate);
+	int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
 
 	if (flags & CLK_DIVIDER_POWER_OF_TWO)
 		div = __roundup_pow_of_two(div);
@@ -292,7 +292,7 @@ int divider_get_val(unsigned long rate, unsigned long parent_rate,
 {
 	unsigned int div, value;
 
-	div = DIV_ROUND_UP(parent_rate, rate);
+	div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
 
 	if (!_is_valid_div(table, div, flags))
 		return -EINVAL;
-- 
2.47.3