[PATCH] ARM: mmu: fix flush_cacheable_pages off-by-one touching guard page

[Stephano Cetola]

On 8/24/26 6:27 AM, Ahmad Fatoum wrote:
> Hello Stephano,
> 
> Thanks for your patch!

Thank you for encouraging me to upstream. :)

> 
> I agree there is a bug here, but making flush_end exclusive doesn't
> sound like the best remedy to me, exactly because these + 1's and - 1's
> are so error-prone.

Ah okay, this makes sense now.

> 
> Also it seems the code has problems if a cached region reaches the end
> of address space, which can happen on some 32-bit ARM SoCs, like the i.MX6Q.
> 
> I am working on a revised patch that I will share within the week.
> 

Excellent. I will test your fix on the Radxa CM5 RK3588S2. Let me know
if there's anything else I can do to help here.

Cheers,
Stephano