[PATCH 11/27] mtd: nand: mrvl_nfc: do not report a command timeout as an error

[Sascha Hauer]

Identifying the chip prints

  mrvl_nand ...: Waiting end of command 0th 236 timeout, \
      ndsr=0x00000800 ndcr=0x10041fff

once on every boot. Command 236 is 0xEC, NAND_CMD_PARAM: the nand layer
asks for the ONFI parameter page to find out whether the chip is ONFI at
all, the controller never raises CS0_CMDD for it - NDSR reads back
FLASH_RDY alone - and the wait times out. The layer above then finds no
parameter page, falls back to identifying the chip from its id bytes,
and everything from there on works.

So this is a capability probe coming back negative, not a failure.
Nothing acts on it either: mrvl_nand_wait_cmd_done() has no return
value. Print it as a debug message.

Whether NAND_CMD_PARAM can be made to complete on this controller is a
separate question; this only stops the answer from looking like a fault.

Assisted-by: Claude Opus 5
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
---
 drivers/mtd/nand/raw/nand_mrvl_nfc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/nand_mrvl_nfc.c b/drivers/mtd/nand/raw/nand_mrvl_nfc.c
index b1532dbf1b..a5e30db669 100644
--- a/drivers/mtd/nand/raw/nand_mrvl_nfc.c
+++ b/drivers/mtd/nand/raw/nand_mrvl_nfc.c
@@ -813,7 +813,7 @@ static void mrvl_nand_wait_cmd_done(struct mrvl_nand_host *host,
 	wait_on_timeout(host->chip.legacy.chip_delay * USECOND,
 			(nand_readl(host, NDSR) & mask) == mask);
 	if ((nand_readl(host, NDSR) & mask) != mask) {
-		dev_err(host->dev, "Waiting end of command %dth %d timeout, ndsr=0x%08x ndcr=0x%08x\n",
+		dev_dbg(host->dev, "Waiting end of command %dth %d timeout, ndsr=0x%08x ndcr=0x%08x\n",
 			nb_done++, command, nand_readl(host, NDSR),
 			nand_readl(host, NDCR));
 	}

-- 
2.47.3