[PATCH] fixup! net: designware_eqs: set upper 32bit address for DMA descriptors to support 64-bit addressing

[Sascha Hauer]

On 2026-08-05 16:21, Ahmad Fatoum wrote:
> net: designware_eqos: fix left shift count >= width of type
> 
> CI builds with -Werror, including -Werror=shift-count-overflow, which
> fails for STM32MP enabled platform that use EQOS on a 32-bit platform.
> 
> As des1 will have always been programmed to zero on a 32-bit platform,
> we can just suppress the warning with a cast.
> 
> Cc: zhengxiaojun <zheng.xiaojun at foxmail.com>
> Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
> ---
>  drivers/net/designware_eqos.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c
> index 332dc7eb7366..4011b006dd70 100644
> --- a/drivers/net/designware_eqos.c
> +++ b/drivers/net/designware_eqos.c
> @@ -955,8 +955,8 @@ void eqos_remove(struct device *dev)
>  
>  	mdiobus_unregister(&eqos->miibus);
>  
> -	dma = eqos->rx_descs[0].des1;
> -	dma = (dma << 32) + eqos->rx_descs[0].des0;
> +	dma = (u64)eqos->rx_descs[0].des1 << 32;
> +	dma |= eqos->rx_descs[0].des0;

I also stumbled upon this and was halfway through implementing an
alternative: keep the virtual address around in private data so that
we can directly use it instead of reconstructing it from the descriptor
ring. I've sent it out now.

Sascha

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