[PATCH 4/9] arm: socfpga: agilex5: fix read of memory limit
Michael Tretter
m.tretter at pengutronix.de
Thu Apr 16 02:48:08 PDT 2026
FW_MPU_DDR_DMI0_SCR_READL adds the base address to the register address.
Drop it from the caller to avoid adding the base address twice.
Signed-off-by: Michael Tretter <m.tretter at pengutronix.de>
---
include/mach/socfpga/soc64-sdram.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/mach/socfpga/soc64-sdram.h b/include/mach/socfpga/soc64-sdram.h
index c84cd7f82537..8f367822e869 100644
--- a/include/mach/socfpga/soc64-sdram.h
+++ b/include/mach/socfpga/soc64-sdram.h
@@ -8,6 +8,8 @@
#include <linux/sizes.h>
+#include <mach/socfpga/soc64-firewall.h>
+
struct altera_sdram_plat {
void __iomem *mpfe_base_addr;
bool dualport;
@@ -192,8 +194,7 @@ static inline resource_size_t agilex5_mpfe_sdram_size(void)
u32 lower;
resource_size_t mem = 0;
- lower = FW_MPU_DDR_DMI0_SCR_READL(SOCFPGA_FW_DDR_CCU_DMI0_ADDRESS +
- FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT);
+ lower = FW_MPU_DDR_DMI0_SCR_READL(FW_MPU_DDR_SCR_MPUREGION0ADDR_LIMIT);
mem = lower;
--
2.47.3
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