[PATCH master] ARM: cpu: don't clobber sp when booted in HYP mode

Sascha Hauer sha at pengutronix.de
Tue May 31 01:06:19 PDT 2022

On Mon, May 30, 2022 at 09:39:48AM +0200, Ahmad Fatoum wrote:
> arm_cpu_lowlevel_init() is usually called first thing and will ensure
> barebox runs in SVC mode. If barebox is started in HYP mode instead,
> like is the case on Raspberry Pi 2-3, it will do an exception return
> into SVC mode, which will bank the previously used SP_Hyp and
> restore SP_Svc that may not have been properly initialized by barebox.
> This wasn't too bad so far, because arm_setup_stack was usually called
> after arm_cpu_lowlevel_init, but with ENTRY_FUNCTION_WITHSTACK, SP is
> initialized early on in the naked entry point with
> arm_cpu_lowlevel_init() being called after that.
> This can lead to spurious boot hangs in the Raspberry Pi 2 and 3 entry
> points. Fix this by always saving sp to r3 and restoring it, like we do
> with lr. This is safe to do, because r3 isn't clobbered by any
> instruction in arm_cpu_lowlevel_init() and because it's an argument
> register, callers have to expect it being overwritten by the callee.
> Fixes: b267578d0567 ("ARM: rpi: use ENTRY_FUNCTION_WITHSTACK to prepare for ARM64 support")
> Fixes: 41292192c01b ("ARM: safely switch from HYP to SVC mode if required")
> Signed-off-by: Ahmad Fatoum <a.fatoum at pengutronix.de>
> ---
>  arch/arm/cpu/lowlevel.S | 2 ++
>  1 file changed, 2 insertions(+)
> diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S
> index 5a7dd3c2093f..2199d9416cb3 100644
> --- a/arch/arm/cpu/lowlevel.S
> +++ b/arch/arm/cpu/lowlevel.S
> @@ -9,6 +9,7 @@
>  ENTRY(arm_cpu_lowlevel_init)
>  	/* save lr, since it may be banked away with a processor mode change */
>  	mov	r2, lr
> +	mov	r3, sp

Can you add a comment why this is necessary? We can look at the commit
message for the elaborated description, but a reminder in the code still
seems useful, otherwise I might be trapped into applying a "remove
useless code" patch.


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