[PATCH] ARM: OMAP: debug_ll: Use Kconfig UART base address
Lucas Stach
l.stach at pengutronix.de
Thu May 5 00:55:26 PDT 2022
Am Donnerstag, dem 05.05.2022 um 10:36 +0300 schrieb Alexander Shiyan:
> Signed-off-by: Alexander Shiyan <eagle.alexander923 at gmail.com>
Is this really a change in the right direction? The way it is currently
done seems to mix well with overall multi-image theme of Barebox. By
using a Kconfig for that, the setting will most likely be wrong for a
subset of boards in a multi-image build.
Regards,
Lucas
> ---
> arch/arm/boards/afi-gf/lowlevel.c | 2 +-
> arch/arm/boards/beagle/lowlevel.c | 2 +-
> arch/arm/boards/beaglebone/lowlevel.c | 2 +-
> arch/arm/boards/myirtech-x335x/lowlevel.c | 2 +-
> arch/arm/boards/phytec-som-am335x/lowlevel.c | 2 +-
> arch/arm/boards/vscom-baltos/lowlevel.c | 2 +-
> arch/arm/boards/wago-pfc-am35xx/lowlevel.c | 2 +-
> arch/arm/mach-omap/include/mach/debug_ll.h | 43 ++++++++++++--------
> 8 files changed, 33 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c
> index de40f6c5af..9e86b29b2d 100644
> --- a/arch/arm/boards/afi-gf/lowlevel.c
> +++ b/arch/arm/boards/afi-gf/lowlevel.c
> @@ -230,7 +230,7 @@ static noinline int gf_sram_init(void)
>
> am33xx_uart_soft_reset((void *)AM33XX_UART2_BASE);
> am33xx_enable_uart2_pin_mux();
> - omap_uart_lowlevel_init((void *)AM33XX_UART2_BASE);
> + omap_uart_lowlevel_init();
> putc_ll('>');
>
> barebox_arm_entry(0x80000000, SZ_256M, fdt);
> diff --git a/arch/arm/boards/beagle/lowlevel.c b/arch/arm/boards/beagle/lowlevel.c
> index 683ab552f4..c64a2114d4 100644
> --- a/arch/arm/boards/beagle/lowlevel.c
> +++ b/arch/arm/boards/beagle/lowlevel.c
> @@ -196,7 +196,7 @@ static noinline int beagle_board_init(void)
>
> mux_config();
>
> - omap_uart_lowlevel_init((void *)OMAP3_UART3_BASE);
> + omap_uart_lowlevel_init();
>
> /* Dont reconfigure SDRAM while running in SDRAM! */
> if (!in_sdram)
> diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c
> index 544e396e03..365ba64a79 100644
> --- a/arch/arm/boards/beaglebone/lowlevel.c
> +++ b/arch/arm/boards/beaglebone/lowlevel.c
> @@ -139,7 +139,7 @@ static noinline int beaglebone_sram_init(void)
>
> am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
> am33xx_enable_uart0_pin_mux();
> - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
> + omap_uart_lowlevel_init();
> putc_ll('>');
>
> barebox_arm_entry(0x80000000, sdram_size, fdt);
> diff --git a/arch/arm/boards/myirtech-x335x/lowlevel.c b/arch/arm/boards/myirtech-x335x/lowlevel.c
> index 1a883da203..da47300d81 100644
> --- a/arch/arm/boards/myirtech-x335x/lowlevel.c
> +++ b/arch/arm/boards/myirtech-x335x/lowlevel.c
> @@ -98,7 +98,7 @@ ENTRY_FUNCTION(start_am33xx_myirtech_sram, bootinfo, r1, r2)
> if (IS_ENABLED(CONFIG_DEBUG_LL)) {
> am33xx_uart_soft_reset(IOMEM(AM33XX_UART0_BASE));
> am33xx_enable_uart0_pin_mux();
> - omap_uart_lowlevel_init(IOMEM(AM33XX_UART0_BASE));
> + omap_uart_lowlevel_init();
> putc_ll('>');
> }
>
> diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
> index bffb3ad880..e4f3edd211 100644
> --- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
> +++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
> @@ -172,7 +172,7 @@ static noinline void physom_board_init(void *fdt, int sdram, int module_family)
>
> am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
> am33xx_enable_uart0_pin_mux();
> - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
> + omap_uart_lowlevel_init();
> putc_ll('>');
>
> am335x_barebox_entry(fdt);
> diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c
> index 7da2f92efb..2401cf20c4 100644
> --- a/arch/arm/boards/vscom-baltos/lowlevel.c
> +++ b/arch/arm/boards/vscom-baltos/lowlevel.c
> @@ -104,7 +104,7 @@ static noinline void baltos_sram_init(void)
>
> am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
> am33xx_enable_uart0_pin_mux();
> - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
> + omap_uart_lowlevel_init();
> putc_ll('>');
>
> am335x_barebox_entry(fdt);
> diff --git a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c
> index 7da8fd0331..6a7f350dda 100644
> --- a/arch/arm/boards/wago-pfc-am35xx/lowlevel.c
> +++ b/arch/arm/boards/wago-pfc-am35xx/lowlevel.c
> @@ -185,7 +185,7 @@ static noinline void pfc200_board_init(void)
>
> if (IS_ENABLED(CONFIG_DEBUG_LL)) {
> am33xx_uart_soft_reset(IOMEM(OMAP3_UART3_BASE));
> - omap_uart_lowlevel_init(IOMEM(OMAP3_UART3_BASE));
> + omap_uart_lowlevel_init();
> putc_ll('>');
> }
>
> diff --git a/arch/arm/mach-omap/include/mach/debug_ll.h b/arch/arm/mach-omap/include/mach/debug_ll.h
> index 25ddd485be..30a0d830c3 100644
> --- a/arch/arm/mach-omap/include/mach/debug_ll.h
> +++ b/arch/arm/mach-omap/include/mach/debug_ll.h
> @@ -22,6 +22,8 @@
> #include <mach/omap4-silicon.h>
> #include <mach/am33xx-silicon.h>
>
> +#ifdef CONFIG_DEBUG_LL
> +
> #define LSR_THRE 0x20 /* Xmit holding register empty */
> #define LCR_BKSE 0x80 /* Bank select enable */
> #define LSR (5 << 2)
> @@ -34,22 +36,6 @@
> #define MCR (4 << 2)
> #define MDR (8 << 2)
>
> -static inline void omap_uart_lowlevel_init(void __iomem *base)
> -{
> - writeb(0x00, base + LCR);
> - writeb(0x00, base + IER);
> - writeb(0x07, base + MDR);
> - writeb(LCR_BKSE, base + LCR);
> - writeb(26, base + DLL); /* 115200 */
> - writeb(0, base + DLM);
> - writeb(0x03, base + LCR);
> - writeb(0x03, base + MCR);
> - writeb(0x07, base + FCR);
> - writeb(0x00, base + MDR);
> -}
> -
> -#ifdef CONFIG_DEBUG_LL
> -
> #ifdef CONFIG_DEBUG_OMAP3_UART
> #define OMAP_DEBUG_SOC OMAP3
> #elif defined CONFIG_DEBUG_OMAP4_UART
> @@ -63,6 +49,23 @@ static inline void omap_uart_lowlevel_init(void __iomem *base)
> #define __OMAP_UART_BASE(soc, num) soc##_UART##num##_BASE
> #define OMAP_UART_BASE(soc, num) __OMAP_UART_BASE(soc, num)
>
> +static inline void omap_uart_lowlevel_init(void)
> +{
> + void __iomem *base = (void *)OMAP_UART_BASE(OMAP_DEBUG_SOC,
> + CONFIG_DEBUG_OMAP_UART_PORT);
> +
> + writeb(0x00, base + LCR);
> + writeb(0x00, base + IER);
> + writeb(0x07, base + MDR);
> + writeb(LCR_BKSE, base + LCR);
> + writeb(26, base + DLL); /* 115200 */
> + writeb(0, base + DLM);
> + writeb(0x03, base + LCR);
> + writeb(0x03, base + MCR);
> + writeb(0x07, base + FCR);
> + writeb(0x00, base + MDR);
> +}
> +
> static inline void PUTC_LL(char c)
> {
> void __iomem *base = (void *)OMAP_UART_BASE(OMAP_DEBUG_SOC,
> @@ -75,6 +78,12 @@ static inline void PUTC_LL(char c)
> /* Wait to make sure it hits the line, in case we die too soon. */
> while ((readb(base + LSR) & LSR_THRE) == 0);
> }
> -#endif
> +#else /* CONFIG_DEBUG_LL */
> +
> +static inline void omap_uart_lowlevel_init(void)
> +{
> +}
> +
> +#endif /* CONFIG_DEBUG_LL */
>
> #endif
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