[RFC PATCH 03/15] FIXME: mips: fix copy_to_link_location for 64 bit mode

[Peter Mamonov]

A better solution: use 4 instead of LONGSIZE

Signed-off-by: Peter Mamonov <pmamonov at gmail.com>
---
 arch/mips/include/asm/pbl_macros.h | 24 ++++++++++++++++--------
 1 file changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h
index 37b150ac2..8950b400d 100644
--- a/arch/mips/include/asm/pbl_macros.h
+++ b/arch/mips/include/asm/pbl_macros.h
@@ -134,17 +134,25 @@
 	subu	t2, t1, t0	/* t2 <- size of pbl */
 	addu	a2, a0, t2	/* a2 <- source end address */
 
+#if (LONGSIZE == 4)
+#define LW	lw
+#define SW	sw
+#endif
+#if (LONGSIZE == 8)
+#define LW	ld
+#define SW	sd
+#endif
 copy_loop:
 	/* copy from source address [a0] */
-	lw	t4, LONGSIZE * 0(a0)
-	lw	t5, LONGSIZE * 1(a0)
-	lw	t6, LONGSIZE * 2(a0)
-	lw	t7, LONGSIZE * 3(a0)
+	LW	t4, LONGSIZE * 0(a0)
+	LW	t5, LONGSIZE * 1(a0)
+	LW	t6, LONGSIZE * 2(a0)
+	LW	t7, LONGSIZE * 3(a0)
 	/* copy to target address [a1] */
-	sw	t4, LONGSIZE * 0(a1)
-	sw	t5, LONGSIZE * 1(a1)
-	sw	t6, LONGSIZE * 2(a1)
-	sw	t7, LONGSIZE * 3(a1)
+	SW	t4, LONGSIZE * 0(a1)
+	SW	t5, LONGSIZE * 1(a1)
+	SW	t6, LONGSIZE * 2(a1)
+	SW	t7, LONGSIZE * 3(a1)
 	addi	a0, LONGSIZE * 4
 	subu	t3, a0, a2
 	blez	t3, copy_loop
-- 
2.17.0