[PATCH 04/28] ARM: mmu: Introduce set_ttbr()

Andrey Smirnov andrew.smirnov at gmail.com
Tue May 8 14:29:27 PDT 2018


Signed-off-by: Andrey Smirnov <andrew.smirnov at gmail.com>
---
 arch/arm/cpu/mmu-early.c | 3 +--
 arch/arm/cpu/mmu.c       | 3 +--
 arch/arm/cpu/mmu.h       | 5 +++++
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c
index fc14d5cac..79fc3080a 100644
--- a/arch/arm/cpu/mmu-early.c
+++ b/arch/arm/cpu/mmu-early.c
@@ -39,8 +39,7 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize,
 
 	arm_set_cache_functions();
 
-	/* Set the ttb register */
-	asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
+	set_ttbr(ttb);
 
 	/* Set the Domain Access Control Register */
 	i = 0x3;
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index c70e9e782..28732b795 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -471,8 +471,7 @@ static int mmu_init(void)
 
 	pr_debug("ttb: 0x%p\n", ttb);
 
-	/* Set the ttb register */
-	asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
+	set_ttbr(ttb);
 
 	/* Set the Domain Access Control Register */
 	i = 0x3;
diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h
index 79ebc80d7..5dcf4b53a 100644
--- a/arch/arm/cpu/mmu.h
+++ b/arch/arm/cpu/mmu.h
@@ -11,4 +11,9 @@ static inline void __mmu_cache_off(void) {}
 static inline void __mmu_cache_flush(void) {}
 #endif
 
+static inline void set_ttbr(void *ttb)
+{
+	asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb) /*:*/);
+}
+
 #endif /* __ARM_MMU_H */
-- 
2.17.0




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