[PATCH 8/8] doc: Add RK3288 Documentation

[Wadim Egorov]

On 21.07.2016 09:00, Sascha Hauer wrote:
> On Wed, Jul 20, 2016 at 04:17:45PM +0200, Wadim Egorov wrote:
>> Signed-off-by: Wadim Egorov <w.egorov at phytec.de>
>> ---
>>  Documentation/boards/rk3288.rst            | 57 ++++++++++++++++++++++++++++++
>>  Documentation/boards/rk3288/phytec-som.rst | 24 +++++++++++++
>>  2 files changed, 81 insertions(+)
>>  create mode 100644 Documentation/boards/rk3288.rst
>>  create mode 100644 Documentation/boards/rk3288/phytec-som.rst
>>
>> diff --git a/Documentation/boards/rk3288.rst b/Documentation/boards/rk3288.rst
>> new file mode 100644
>> index 0000000..3acca74
>> --- /dev/null
>> +++ b/Documentation/boards/rk3288.rst
>> @@ -0,0 +1,57 @@
>> +Rockchip RK3288
>> +===============
>> +
>> +The RK3288 SoC has a two stage boot process. The booting is completed in two
>> +consecutive stages. The binary for the 1st stage is referred to as the
>> +Secondary Program Loader (SPL). The binary for the 2nd stage is simply referred to
>> +as barebox.
>> +SPL is a non-interactive loader and is only used to boot the 2nd stage loader.
>> +
>> +At this moment barebox can only be used as a 2nd stage bootloader.
>> +Starting barebox requires another bootloader which will do the very basic
>> +SDRAM initialization for us. We can use the u-boot for that.
> Do you plan to add SPL support for barebox aswell? From what I see in
> the U-Boot source code the Rockchip SoCs seem to be of the nicer SoCs
> which do not require that much and complicated setup.
>
> Sascha

Yes, I would like to add SPL support for barebox later.
The only problem I see is the very limited SPL size (32K).