[PATCH 2/3] video: IPU framebuffer: honor clock and enable polarities
Jan Luebbe
jlu at pengutronix.de
Thu Dec 8 09:04:40 PST 2016
These flags are already parsed from DT, so we can just use them to
configure the timings correctly.
Signed-off-by: Jan Luebbe <jlu at pengutronix.de>
---
drivers/video/imx-ipu-v3/ipufb.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/video/imx-ipu-v3/ipufb.c b/drivers/video/imx-ipu-v3/ipufb.c
index 63024b546d69..343f9e557868 100644
--- a/drivers/video/imx-ipu-v3/ipufb.c
+++ b/drivers/video/imx-ipu-v3/ipufb.c
@@ -128,8 +128,9 @@ int ipu_crtc_mode_set(struct ipufb_info *fbi,
if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
sig_cfg.Vsync_pol = 1;
- sig_cfg.enable_pol = 1;
- sig_cfg.clk_pol = 0;
+ sig_cfg.enable_pol = !(mode->display_flags & DISPLAY_FLAGS_DE_LOW);
+ /* Default to driving pixel data on negative clock edges */
+ sig_cfg.clk_pol = !!(mode->display_flags & DISPLAY_FLAGS_PIXDATA_POSEDGE);
sig_cfg.width = mode->xres;
sig_cfg.height = mode->yres;
sig_cfg.h_start_width = mode->left_margin;
--
2.1.4
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