[PATCH v2] ARM: vector_table: Fix creation of second level page table

[Peter Kardos]

Tested this one as well  with my AT91RM9200 system, v2016.08 + patch; 
The system starts/boots as expected.
If no one objects, we can consider this issue closed/fixed.

Peter

On 8/25/2016 8:36 AM, Sascha Hauer wrote:
> The second level page tables can only start at a 1MiB section boundary,
> so instead of calling arm_create_pte() with the high vector address
> (which is 0xffff0000, not 1MiB aligned) we have to call it with
> 0xfff00000 to correctly create a second level page table.
> The old values broke SoCs which have peripherals in the upper 1MiB
> area, like for example the Atmel AT91RM9200. On these Socs we correctly
> created the vector page, but the pages around it did not have a 1:1
> mapping anymore which led to unreachable peripherals.
>
> Fixes: f6b77fe9: ARM: Rework vector table setup
>
> Reported-by: Peter Kardos <kardos.peter.sk at gmail.com>
> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
> ---
>
> Changes since v1:
> - Use ALIGN_DOWN instead of open coded alignment
> - more clear commit message
>
>   arch/arm/cpu/mmu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
> index a31bce4..459abe5 100644
> --- a/arch/arm/cpu/mmu.c
> +++ b/arch/arm/cpu/mmu.c
> @@ -307,7 +307,7 @@ static void create_vector_table(unsigned long adr)
>   		vectors = xmemalign(PAGE_SIZE, PAGE_SIZE);
>   		pr_debug("Creating vector table, virt = 0x%p, phys = 0x%08lx\n",
>   			 vectors, adr);
> -		exc = arm_create_pte(adr);
> +		exc = arm_create_pte(ALIGN_DOWN(adr, SZ_1M));
>   		idx = (adr & (SZ_1M - 1)) >> PAGE_SHIFT;
>   		exc[idx] = (u32)vectors | PTE_TYPE_SMALL | pte_flags_cached;
>   	}