[PATCH 2/2] mips: cpuinfo: report secondary cache configuration

[Peter Mamonov]

---
 arch/mips/lib/cpuinfo.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/mips/lib/cpuinfo.c b/arch/mips/lib/cpuinfo.c
index 1b17169..fb02a4d 100644
--- a/arch/mips/lib/cpuinfo.c
+++ b/arch/mips/lib/cpuinfo.c
@@ -28,7 +28,7 @@ static char *way_string[] = { NULL, "direct mapped", "2-way",
 
 static int do_cpuinfo(int argc, char *argv[])
 {
-	unsigned int icache_size, dcache_size;
+	unsigned int icache_size, dcache_size, scache_size;
 	struct cpuinfo_mips *c = &current_cpu_data;
 
 	printk(KERN_INFO "CPU revision is: %08x (%s)\n",
@@ -48,6 +48,15 @@ static int do_cpuinfo(int argc, char *argv[])
 	       (c->dcache.flags & MIPS_CACHE_ALIASES) ?
 			"cache aliases" : "no aliases",
 	       c->dcache.linesz);
+	if (c->scache.flags & MIPS_CACHE_NOT_PRESENT)
+		return 0;
+	scache_size = c->scache.sets * c->scache.ways * c->scache.linesz;
+	printk("Secondary data cache %ldkB, %s, %s, %s, linesize %d bytes\n",
+	       scache_size >> 10, way_string[c->scache.ways],
+	       (c->scache.flags & MIPS_CACHE_PINDEX) ? "PIPT" : "VIPT",
+	       (c->scache.flags & MIPS_CACHE_ALIASES) ?
+			"cache aliases" : "no aliases",
+	       c->scache.linesz);
 
 	return 0;
 }
-- 
2.1.4