[PATCH 3/5] arm: initial support for Marvell Dove SoCs
Thomas Petazzoni
thomas.petazzoni at free-electrons.com
Sun May 12 12:49:35 EDT 2013
Dear Sebastian Hesselbarth,
On Sun, 12 May 2013 15:09:04 +0200, Sebastian Hesselbarth wrote:
> +static inline void dove_remap_reg_base(uint32_t intbase,
> + uint32_t mcbase)
> +{
> + uint32_t val;
> +
> + /* remap ahb slave base */
> + val = readl(DOVE_CPU_CTRL) & 0xffff0000;
> + val |= (mcbase & 0xffff0000) >> 16;
> + writel(val, DOVE_CPU_CTRL);
> +
> + /* remap axi bridge address */
> + val = readl(DOVE_AXI_CTRL) & 0x007fffff;
> + val |= mcbase & 0xff800000;
> + writel(val, DOVE_AXI_CTRL);
> +
> + /* remap memory controller base address */
> + val = readl(DOVE_SDRAM_BASE + SDRAM_REGS_BASE_DECODE) & 0x0000ffff;
> + val |= mcbase & 0xffff0000;
> + writel(val, DOVE_SDRAM_BASE + SDRAM_REGS_BASE_DECODE);
> +
> + /* remap internal register */
> + val = intbase & 0xfff00000;
> + writel(val, DOVE_BRIDGE_BASE + INT_REGS_BASE_MAP);
> +}
How does the remapping of the registers plays with the debug_ll code in
arch/arm/mach-mvebu/include/mach/debug_ll.h, which assumes the UART is
at 0xd0012000 ?
Thanks!
Thomas
--
Thomas Petazzoni, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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