[PATCH 3/3] highbank: add l2x0 support

Jean-Christophe PLAGNIOL-VILLARD plagnioj at jcrosoft.com
Mon Feb 11 14:08:31 EST 2013


not enable as on qemu this generate a undefined instruction exception

Cc: Rob Herring <rob.herring at calxeda.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/Kconfig                    |    1 +
 arch/arm/mach-highbank/Makefile     |    1 +
 arch/arm/mach-highbank/cache-l2x0.c |   45 +++++++++++++++++++++++++++++++++++
 arch/arm/mach-highbank/core.h       |    2 ++
 arch/arm/mach-highbank/smc.S        |   27 +++++++++++++++++++++
 5 files changed, 76 insertions(+)
 create mode 100644 arch/arm/mach-highbank/cache-l2x0.c
 create mode 100644 arch/arm/mach-highbank/core.h
 create mode 100644 arch/arm/mach-highbank/smc.S

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c10b9da..2ff544e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -52,6 +52,7 @@ config ARCH_EP93XX
 config ARCH_HIGHBANK
 	bool "Calxeda Highbank"
 	select HAS_DEBUG_LL
+	select ARCH_HAS_L2X0
 	select CPU_V7
 	select ARM_AMBA
 	select AMBA_SP804
diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile
index 3f01cbb..6a7330f 100644
--- a/arch/arm/mach-highbank/Makefile
+++ b/arch/arm/mach-highbank/Makefile
@@ -1,3 +1,4 @@
 obj-y += core.o
 obj-y += devices.o
 obj-y += reset.o
+obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o smc.o
diff --git a/arch/arm/mach-highbank/cache-l2x0.c b/arch/arm/mach-highbank/cache-l2x0.c
new file mode 100644
index 0000000..f1e39dc
--- /dev/null
+++ b/arch/arm/mach-highbank/cache-l2x0.c
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnio at jcrosoft.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+
+#include <asm/mmu.h>
+#include <asm/cache-l2x0.h>
+
+#include "core.h"
+
+static void highbank_l2x0_disable(void)
+{
+	/* Disable PL310 L2 Cache controller */
+	highbank_smc1(0x102, 0x0);
+}
+
+static int highbank_l2x0_init(void)
+{
+	/* Enable PL310 L2 Cache controller */
+	highbank_smc1(0x102, 0x1);
+	l2x0_init(IOMEM(0xfff12000), 0, ~0UL);
+	outer_cache.disable = highbank_l2x0_disable;
+
+	return 0;
+}
+postmmu_initcall(highbank_l2x0_init);
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
new file mode 100644
index 0000000..e3f19b2
--- /dev/null
+++ b/arch/arm/mach-highbank/core.h
@@ -0,0 +1,2 @@
+
+extern void highbank_smc1(int fn, int arg);
diff --git a/arch/arm/mach-highbank/smc.S b/arch/arm/mach-highbank/smc.S
new file mode 100644
index 0000000..b2118b4
--- /dev/null
+++ b/arch/arm/mach-highbank/smc.S
@@ -0,0 +1,27 @@
+/*
+ * Copied from omap44xx-smc.S Copyright (C) 2010 Texas Instruments, Inc.
+ * Copyright 2012 Calxeda, Inc.
+ *
+ * This program is free software,you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+
+/*
+ * This is common routine to manage secure monitor API
+ * used to modify the PL310 secure registers.
+ * 'r0' contains the value to be modified and 'r12' contains
+ * the monitor API number.
+ * Function signature : void highbank_smc1(u32 fn, u32 arg)
+ */
+
+ENTRY(highbank_smc1)
+	stmfd	sp!, {r4-r11, lr}
+	mov	r12, r0
+	mov	r0, r1
+	dsb
+	smc	#0
+	ldmfd	sp!, {r4-r11, pc}
+ENDPROC(highbank_smc1)
-- 
1.7.10.4




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