[PATCH] mtd: nand: mxs: reset BCH earlier to avoid NAND startup problems

[Wolfram Sang]

It could happen (1 out of 100 times) that NAND did not start up
correctly after warm rebooting, so barebox could not find its
environment or DMA timed out due to a stalled BCH. When resetting BCH
together with GPMI, the issue could not be observed anymore. We probably
need the consistent state already before sending commands to NAND.

Signed-off-by: Wolfram Sang <w.sang at pengutronix.de>
---
 drivers/mtd/nand/nand_mxs.c |   13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c
index 975a44f..c4509d3 100644
--- a/drivers/mtd/nand/nand_mxs.c
+++ b/drivers/mtd/nand/nand_mxs.c
@@ -1128,6 +1128,7 @@ int mxs_nand_alloc_buffers(struct mxs_nand_info *nand_info)
 int mxs_nand_hw_init(struct mxs_nand_info *info)
 {
 	void __iomem *gpmi_regs = (void *)MXS_GPMI_BASE;
+	void __iomem *bch_regs = (void __iomem *)MXS_BCH_BASE;
 	int i = 0, ret;
 	u32 val;
 
@@ -1153,6 +1154,15 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
 	if (ret)
 		return ret;
 
+	val = readl(gpmi_regs + GPMI_VERSION);
+	info->version = val >> GPMI_VERSION_MINOR_OFFSET;
+
+	/* Reset BCH. Don't use SFTRST on MX23 due to Errata #2847 */
+	ret = mxs_reset_block(bch_regs + BCH_CTRL,
+				info->version == GPMI_VERSION_TYPE_MX23);
+	if (ret)
+		return ret;
+
 	/*
 	 * Choose NAND mode, set IRQ polarity, disable write protection and
 	 * select BCH ECC.
@@ -1163,9 +1173,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info)
 		GPMI_CTRL1_BCH_MODE;
 	writel(val, gpmi_regs + GPMI_CTRL1);
 
-	val = readl(gpmi_regs + GPMI_VERSION);
-	info->version = val >> GPMI_VERSION_MINOR_OFFSET;
-
 	return 0;
 
 err2:
-- 
1.7.10.4