[RFC/PATCH v2] S3C24xx: NAND management changes to support booting from NAND

[Baruch Siach]

Hi Juergen,

On Mon, Mar 07, 2011 at 10:18:00AM +0100, Juergen Beisert wrote:
> Juergen Beisert wrote:
> > This is revision two of my patch series to make the mini2440 booting from
> > NAND. This seems somehow tricky: The mini2440 with a 64 MiB NAND works fine
> > here, but the one with 128 MiB does currently boot only.
> > In the first patch series where some errors in page address calculation, so
> > they cannot work. This patch series might do it in a correct manner, but
> > now only tested on 64 MiB and 128 MiB NAND. At least booting from NAND is
> > now working also from 128 MiB. But the ECC handling fails, and I have no
> > idea whats wrong now: Reading the environment fails with 'err: -74'...
> 
> Here the main question:
> - what is the difference in ECC handling in the S3C2440 CPU when using
>   a "small page" or a "large page" NAND?
>   "Small page" ECC seems to work, but "large page" ECC fails. Anyone here with
>   more experience with S3C2440/NAND? The Linux driver works well on the large
>   page NANDs, but not the barebox's one.

I don't have experience with the S3C2440 NAND controller, but I'm working on a 
similar problem in the i.MX NAND controller Linux driver. NAND chips with 2k 
page size work fine, but 4k devices fail in the kernel. The cause for this is 
the wrong nand_ecclayout. In the i.MX case, the .eccpos table was too small 
for the larger ECC table of the 4k devices. This caused a corruption of the 
OOB data at the higher level of the NAND stack. Fixing this requires upgrade 
to a newer kernel (I currently use 2.6.36).

As the nand_s3c2410 Barebox driver (like the kernel one) has only one 
nand_ecclayout struct for the 512 bytes page size, this may be the cause of 
your problem.

I hope this helps.

baruch

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