ar9003 family unknown registers description

[Adrian Chadd]

hi!

the ath9k list has been deprecated. use linux-wireless list instead. :)

AR_CHAN_BASE looks like it's the start of the PHY/baseband block.

Not sure about MRC - I think it's "maximum rate(?) combining" but I
don't know exactly. I'd have to go hunt it down.

BB_WATCHDOG has to do with the baseband watchdog in Osprey and later.
It's some silicon that watches for stuck states in the baseband and
resets it without the driver having to do a full chip reset every
time. It's just one bit as far as I can tell!

There's no one datasheet with every register, sorry! The driver should
be treated as authoritative.

Hope that helps!


-adrian


On 5 March 2017 at 21:35, 孙建希 <ycsunjane at gmail.com> wrote:
> hi,
>     I sent an email to this mailing list to take a chance to see if
> anyone knows some of the ath9k drivers. I can not find the ath9k
> mailing list.
>
>     I am reading ath9k driver code. My chip is ar9331 which is ar9003
> family. I am confused by some registers in ar9003_phy.h. In ar9331
> datasheet many registers are reserved.
>
> e.g:
>
> /*
>  * Channel Register Map
> */
> #define AR_CHAN_BASE    0x9800
>
> /*
>  * MRC Register Map
>  */
> #define AR_MRC_BASE     0x9c00
>
> The  ATH9K_INT_BB_WATCHDOG bits of ISR_S2 is also reserved.
>
> Is there something i miss? And how can i get full register description
> datasheet?
>
> Regards
>
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