[PATCH v1] "Reset registers to enhance robustness."

[Pope B.Lei]

Due to the completeness of Opensbi's functionality and its excellent,
stable code, I use Opensbi to boot multiple cores for testing in the
DV system tests of multi-core RISCV SOCs. The DV verification system
is also a real system, and in a certain sense, using Opensbi during
the DV verification phase is even more valuable.

On Wed, May 29, 2024 at 3:40 PM Jessica Clarke <jrtc27 at jrtc27.com> wrote:
>
> On 29 May 2024, at 08:37, Pope B.Lei <popeblei at gmail.com> wrote:
> >
> > Signed-off-by: Pope B.Lei <popeblei at gmail.com>
> > ---
> > V1: If the registers are not initialized, they may remain in an x-state in certain DV verification environments
>
> Don’t do that then? If you want equal traces, use a well-defined start
> or use smarter trace equivalence checking. The code being added serves
> zero practical purpose in a real system.
>
> Jess
>
> > due to the lack of written values, causing the x-state to propagate during the boot process. Adding register initialization enhances robustness.
> > firmware/fw_base.S | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/firmware/fw_base.S b/firmware/fw_base.S
> > index b950c0b..10889a9 100644
> > --- a/firmware/fw_base.S
> > +++ b/firmware/fw_base.S
> > @@ -36,6 +36,8 @@
> > .globl _start
> > .globl _start_warm
> > _start:
> > + /* Reset registers to enhance robustness. */
> > + call _reset_regs
> > /* Find preferred boot HART id */
> > MOV_3R s0, a0, s1, a1, s2, a2
> > call fw_boot_hart
> > --
> > 2.35.2.windows.1
> >
> >
> > --
> > opensbi mailing list
> > opensbi at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/opensbi
>