[PATCH 8/9] arm64: dts: rockchip: rk3588s-nanopi-m6: rename pcie2 power pin

[Shawn Lin]

在 2026/10/15 星期四 0:33, Joachim Eastwood via B4 Relay 写道:
> From: Joachim Eastwood <joachim.eastwood at gmail.com>
> 
> pcie20x1_2_con_pwren matches the signal name in the schematics, which
> simplifies cross-referencing.
> 

Reviewed-by: Shawn Lin <Shawn.lin at rock-chips.com>

> Signed-off-by: Joachim Eastwood <joachim.eastwood at gmail.com>
> ---
>   arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi
> index 6205a542cd1a..ca115d8e108a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-m6.dtsi
> @@ -41,7 +41,7 @@ vcc_3v3_pcie: regulator-vcc-3v3-pcie {
>   		enable-active-high;
>   		gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
>   		pinctrl-names = "default";
> -		pinctrl-0 = <&pcie2_2_pwren>;
> +		pinctrl-0 = <&pcie20x1_2_con_pwren>;
>   		regulator-name = "vcc_3v3_pcie";
>   		regulator-min-microvolt = <3300000>;
>   		regulator-max-microvolt = <3300000>;
> @@ -116,7 +116,7 @@ hp_det: hp-det {
>   	};
>   
>   	pcie {
> -		pcie2_2_pwren: pcie2-2-pwren {
> +		pcie20x1_2_con_pwren: pcie20x1-2-con-pwren {
>   			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
>   		};
>   	};
>