[PATCH] PCI: dw-rockchip: Disable BAR 0 and BAR 1 for RC mode

[Manivannan Sadhasivam]

On Wed, 24 Dec 2025 18:01:01 +0800, Shawn Lin wrote:
> To slitence the useless bar allocation error log of RC when
> scanning bus, as RC doesn't need BARs at all.
> 
>   pci 0000:00:00.0: [1d87:3588] type 01 class 0x060400 PCIe Root Port
>   pci 0000:00:00.0: BAR 0 [mem 0x00000000-0x3fffffff]
>   pci 0000:00:00.0: BAR 1 [mem 0x00000000-0x3fffffff]
>   pci 0000:00:00.0: ROM [mem 0x00000000-0x0000ffff pref]
> 	...
>   pci 0000:00:00.0: BAR 0 [mem 0x900000000-0x93fffffff]: assigned
>   pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: can't assign; no space
>   pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: failed to assign
>   pci 0000:00:00.0: ROM [mem 0xf0200000-0xf020ffff pref]: assigned
>   pci 0000:00:00.0: BAR 0 [mem 0x900000000-0x93fffffff]: releasing
>   pci 0000:00:00.0: ROM [mem 0xf0200000-0xf020ffff pref]: releasing
>   pci 0000:00:00.0: BAR 0 [mem 0x900000000-0x93fffffff]: assigned
>   pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: can't assign; no space
>   pci 0000:00:00.0: BAR 1 [mem size 0x40000000]: failed to assign
> 
> [...]

Applied, thanks!

[1/1] PCI: dw-rockchip: Disable BAR 0 and BAR 1 for RC mode
      commit: b5d712e5b87fc56ff838684afb1bae359eb8069f

Best regards,
-- 
Manivannan Sadhasivam <mani at kernel.org>