[PATCH 1/5] PCI: dw-rockchip: Add phy_calibrate() to check PHY lock status

[Manivannan Sadhasivam]

On Wed, Dec 24, 2025 at 03:10:06PM +0800, Shawn Lin wrote:
> Current we keep controller in reset state when initializing PHY which
> is the right thing to do. But this case, the PHY is also reset because
> it refers to a signal from controller. Now we check PHY lock status
> inside .phy_init() callback which may be bogus for certain type of PHY,
> because of the fact above. Add phy_calibrate() to better check PHY lock
> status if provided.
> 
> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>

I guess this patch can get merged separately without the PHY patches and not
cause any functional issue. But I'd like the PHY patches to get reviewed so that
we know that the API usage is correct.

- Mani

> ---
> 
>  drivers/pci/controller/dwc/pcie-dw-rockchip.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index f8605fe..75d6306 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -705,6 +705,12 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
>  	if (ret)
>  		goto deinit_phy;
>  
> +	ret = phy_calibrate(rockchip->phy);
> +	if (ret) {
> +		dev_err(dev, "phy lock failed\n");
> +		goto assert_controller;
> +	}
> +
>  	ret = rockchip_pcie_clk_init(rockchip);
>  	if (ret)
>  		goto deinit_phy;
> @@ -727,7 +733,8 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
>  	}
>  
>  	return 0;
> -
> +assert_controller:
> +	reset_control_assert(rockchip->rst);
>  deinit_clk:
>  	clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
>  deinit_phy:
> -- 
> 2.7.4
> 

-- 
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