[RESEND PATCH v3] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1

[Shawn Lin]

在 2025/12/07 星期日 15:50, Anand Moon 写道:
> Hi Shawn,
> 
> On Thu, 4 Dec 2025 at 06:21, Shawn Lin <shawn.lin at rock-chips.com> wrote:
>>
>> Add supports-clkreq and pinmux for PCIe ASPM L1 substates.
>>
>> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
>> Acked-by: Manivannan Sadhasivam <mani at kernel.org>
>> Reviewed-by: Hans Zhang <hans.zhang at cixtech.com>
>> ---
> Thanks, are there plans to support this feature on the remaining
> RK356x and RK3588 SBCs?

It needs to be checked on a per-board basis.

We're happy for folks to add it themselves for their boards once they've
verified the clkreqpin on their hardware.

> 
> Thanks
> -Anand
>>
>> It belongs to a series that adding L1ss support for Rockchip platforms.
>> The driver changes has been in mainline via 6.19 merge window, so just
>> resent this patch with collecting tags.
>>
>>   arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 7 +++++--
>>   1 file changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
>> index ff1ba5e..c9d284c 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
>> +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
>> @@ -522,6 +522,7 @@
>>          pinctrl-names = "default";
>>          pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>;
>>          reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
>> +       supports-clkreq;
>>          vpcie3v3-supply = <&vcc3v3_wlan>;
>>          status = "okay";
>>
>> @@ -545,7 +546,8 @@
>>   &pcie2x1l1 {
>>          reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
>>          pinctrl-names = "default";
>> -       pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
>> +       pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>, <&pcie30x1m1_1_clkreqn>;
>> +       supports-clkreq;
>>          status = "okay";
>>   };
>>
>> @@ -555,7 +557,8 @@
>>
>>   &pcie3x4 {
>>          pinctrl-names = "default";
>> -       pinctrl-0 = <&pcie3_reset>;
>> +       pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>;
>> +       supports-clkreq;
>>          reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
>>          vpcie3v3-supply = <&vcc3v3_pcie30>;
>>          status = "okay";
>> --
>> 2.7.4
>>
>>
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>